MICROPROCESSOR
- A
processor’s instruction set is a determining factor in its architecture.
- On the
basis of the instruction set, microprocessors are classified as–
○ Reduced Instruction Set Computer (RISC), and
○ Complex Instruction Set Computer (CISC). The x86 instruction set. - CISC
architecture hardwires the processor with complex instructions, which are
difficult to create otherwise using basic instructions.
- CISC
combines the different instructions into one single CPU.
○ CISC has large instruction set that includes simple and fast instructions for performing basic tasks, as well as complex instructions that correspond to statement in the high level language.
○ An increased number of instructions (200 to 300) results in a much more complex processor, requiring millions of transistors.
○ Instructions are of variable lengths, using 8, 16 or 32 bits for storage. This results in the processor’s time being spent in calculating where each instruction begins and ends.
○ With large number of application software programs being written for the processor, a new processor has to be backwards compatible to the older version of processors.
○ AMD and Cyrix are based on CISC.
- RISC
has simple, single-cycle instructions, which perform only basic
instructions.
- RISC
architecture does not have hardwired advanced functions.
- All
high-level language support is done in the software.
○ RISC has fewer instructions and requires fewer transistors, which results in the reduced manufacturing cost of the processor.
○ The instruction size is fixed (32 bits). The processor need not spend time in finding out where each instruction begins and ends.
○ RISC architecture has a reduced production cost compared to CISC processor.
○ The instructions, simple in nature, are executed in just one clock cycle, which speeds up the program execution when compared to CISC processors.
○ RISC processors can handle multiple instructions simultaneously by processing them in parallel.
○ Apple Mac G3 and Power PC are based on RISC. - Processors
like Athlon XP and Pentium IV use a hybrid of both technologies.
Pipelining improves instruction execution speed by
putting the execution steps into parallel. A CPU can receive a single
instruction, begin executing it, and receive another instruction before
it has completed the first. This allows for more instructions to be performed,
about one instruction per cycle.
Parallel Processing is the simultaneous execution of
instructions from the program on different processors. A program is divided
into multiple processes that are handled in parallel in order to reduce
execution time.
INTERCONNECTING THE UNITS OF A COMPUTER
- CPU
sends data, instructions, and information to the components inside the
computer as well as to the peripherals and devices attached to it.
- Bus
is a set of electronic signal pathways that allows information and signals
to travel between components inside or outside of a computer.
- The
different components of a computer, i.e., CPU, I/O unit, and memory
unit, are connected with each other by a bus.
- The
data, instructions, and the signals are carried between the different
components via a bus. The features and functionality of a bus are
as follows–
○ A bus is a set of wires used for interconnection, where each wire can carry one bit of data.
○ A bus width is defined by the number of wires in the bus.
○ A computer bus can be divided into two types– Internal Bus and External Bus.
○ The Internal Bus connects components inside the motherboard like CPU and system memory. It is also called the System Bus.
- The External
Bus connects the different external devices, peripherals, expansion
slots, I/O ports, and drive connections to the rest of the computer.
- The External
Bus allows various devices to be attached to the computer.
- It
allows for the expansion of computer’s capabilities.
- It is
generally slower than the System Bus. It is also referred to
as the Expansion Bus.
· A system bus or expansion
bus comprises of three kinds of buses – data bus, address bus, and
control bus.
· The interaction of CPU with memory
and I/O devices involves all the three buses.
o
The command to access the memory or the I/O devices is carried by
the control bus.
o
The address of I/O device or memory is carried by the address
bus.
o
The data to be transferred is carried by the data bus.